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Static Noise Margin Evaluation Method Based on Direct Polynomial-Curve-Fitting with Universal SRAM Cell Inverter TEG Measurement

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3 Author(s)
Kazuyuki Nakamura ; Center for Microelectronic Systems, Kyushu Institute of Technology, 680-4 Kawazu, Iizuka, Fukuoka 820-8502, Japan. Tel: +81-948-29-7584, Fax: +81-948-29-7586, Email: nakamura@cms.kyutech.ac.jp ; Kazunori Noda ; Hiroki Koike

A new method to evaluate the static noise margin (SNM) for leading-edge CMOS SRAM development is proposed. This method includes: (1) direct measurement of the inverter DC transfer curves using a "universal SRAM cell inverter TEG (USCIT)" with arbitrary transistor ratios, (2) curve-fitting of the measured data to polynomial functions in a 45-degree rotated space, and (3) a database of the polynomial coefficients to evaluate and optimize the SNM by a simple algebraic operation. The SNM values obtained using this method are in good agreement with the measured SRAM operations.

Published in:

2009 IEEE International Conference on Microelectronic Test Structures

Date of Conference:

March 30 2009-April 2 2009