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Combinational logic soft errors are a major environment-related reliability issue in advanced CMOS processes. The key to determining logic soft error rates (SERs) is detailed knowledge of neutron- and alpha-particle-induced single-event transient (SET) pulsewidths, but these pulsewidths are difficult to measure directly. Experimental results obtained using a novel test chip fabricated in a 90-nm CMOS technology indicate that the SET widths induced by these particles are similar to those of legitimate logic signals. The logic failure-in-time (FIT) rates, computed based on experimental SET cross sections, correspond with previous simulation-based projections of FIT rates and indicate that logic SER may be an issue for some terrestrial applications. Monte Carlo-based simulations are used to verify experimental cross sections and to project scaling of neutron and alpha SET cross sections. These results indicate that alpha-particle-induced SET cross sections scale more rapidly than neutron SET cross sections.
Device and Materials Reliability, IEEE Transactions on (Volume:9 , Issue: 2 )
Date of Publication: June 2009