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VLSI architectures of perceptual based video watermarking for real-time copyright protection

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4 Author(s)
Saraju P. Mohanty ; VLSI Design and CAD Laboratory, University of North Texas, Denton, 76203, USA ; Elias Kougianos ; Wei Cai ; Manish Ratnani

For effective digital rights management (DRM) of multimedia in the framework of embedded systems, both watermarking and cryptography are necessary. In this paper, we present a watermarking algorithm and VLSI architecture that can insert a broadcaster's logo in video streams in real-time to facilitate copyrighted video broadcasting and internet protocol television (IP-TV). The VLSI architecture, when realized in silicon can be deployed in any multimedia producing appliance to enable DRM. The watermark is inserted in the video stream beforeMPEG-4 compression, resulting in simplified hardware requirements and superior video quality. The watermarking process is performed in the frequency domain. The system is initially prototyped and validated in MATLAB/Simulink and subsequently implemented on an Altera Cyclone-II FPGA. Its maximum throughput is 43 frames/sec at a clock speed of 100 MHz which makes it suitable for real-time digital video broadcasting emerging applications such as IP-TV.

Published in:

2009 10th International Symposium on Quality Electronic Design

Date of Conference:

16-18 March 2009