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Improving the accuracy of rule-based equivalence checking of system-level design descriptions by identifying potential internal equivalences

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2 Author(s)
Yoshida, H. ; VLSI Design & Educ. Center (VDEC), Univ. of Tokyo, Tokyo ; Fujita, M.

Rule-based equivalence checking of system-level design descriptions proves the equivalence of two system-level design descriptions by applying the equivalence rules in a bottom-up manner. Since the previous work derives the equivalence of the internal variables based on their names, the method often fails to prove the equivalence when the variable names are changed. This paper proposes a method for improving the accuracy of the rule-based equivalence checking by identifying potential internal equivalences using random simulation. Experimental results using an example design show that the proposed method can prove the equivalence of the designs before and after a practical design optimization.

Published in:

Quality of Electronic Design, 2009. ISQED 2009. Quality Electronic Design

Date of Conference:

16-18 March 2009

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