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An efficient reliability evaluation approach for system-level design of embedded systems

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3 Author(s)
Israr, A. ; Integrated Circuits & Syst. Lab., Tech. Univ. Darmstadt, Darmstadt, Germany ; Shoufan, A. ; Huss, S.A.

A system-level design process of reliable systems demands efficient reliability evaluation of the explored design alternatives. This paper presents a new approach to accelerate the reliability evaluation and, thus, the design space exploration for reliable systems. A new data structure denoted as system error decision diagram (SEDD) is proposed, which is based on both binary decision diagrams to model permanent errors and zero-suppressed decision diagrams to model transient errors. Both constructing the SEDD diagram and evaluating reliability based on it are detailed in an algorithmic way. The proposed approach is demonstrated for a control system taken from the automotive domain.

Published in:

Quality of Electronic Design, 2009. ISQED 2009. Quality Electronic Design

Date of Conference:

16-18 March 2009