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Low-complexity entirely-overlapped parallel decoder architecture for quasi-cyclic LDPC codes

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2 Author(s)
Weizhi Lu ; School of Information Science and Engineering, Shandong University, Jinan, China ; Piming Ma

In this paper, we propose a low-complexity entirely-overlapped partially-parallel decoder architecture for quasi-cyclic low-density parity-check (QC-LDPC) codes. For a (c, t)-regular QC-LDPC decoder, this decoder can achieve approximate 100% hardware utilization efficiency (HUE) and entirely overlapped decoding by using only one check node process unit group (CNUG) to process c groups of check node messages sequentially. Compared with traditional partially-parallel decoder, the quantities of check node process unit (CNU), barrel shifters and counters can be decreased prominently. Moreover, it is flexible in code rate and code length.

Published in:

Advanced Communication Technology, 2009. ICACT 2009. 11th International Conference on  (Volume:02 )

Date of Conference:

15-18 Feb. 2009