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Reconfigurable firewall unit by wave-pipelined operations

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3 Author(s)
Sato, T. ; C&C Syst. Center, Hirosaki Univ., Hirosaki ; Imaruoka, S. ; Fukase, M.

A firewall unit of H-HIPS (Hardware- and Host-Based Intrusion Prevention System) is needed for reduction of unauthorized access detecting circuits. Because H-HIPS has been achieved by using FPGA, generated circuits by logic synthesis software operate with low-speed clock signals. For operating with high-speed clock signals, pipelined circuits are required. They cause consumption of LUTs (LookUp Table) and registers and increase of power consumption. In this paper, we propose wave-pipelined operation of the firewall unit without reconstruction of circuits. Wave-pipelined circuits have never been achieved without them. We show the unit by wave-pipelined operation can use clock signals of the frequency twice by the gate-level simulation.

Published in:

Intelligent Signal Processing and Communications Systems, 2008. ISPACS 2008. International Symposium on

Date of Conference:

8-11 Feb. 2009