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A 256 mW 40 Mbps Full-HD H.264 High-Profile Codec Featuring a Dual-Macroblock Pipeline Architecture in 65 nm CMOS

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12 Author(s)
Iwata, K. ; Renesas Technol. Corp., Tokyo ; Mochizuki, S. ; Kimura, M. ; Shibayama, T.
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A video-size-scalable H.264 high-profile codec including 19 application-specific CPUs for extensibility to multiple standards has been fabricated in 65 nm CMOS. With two parallel pipelines for macroblock processing, the codec consumed 256 mW in real-time encoding of 40 Mbp full-HDs (1080p30) video at an operating frequency of 162 MHz.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:44 ,  Issue: 4 )