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In this paper, computationally-efficient sinusoidal disturbance estimation and elimination methods are introduced into the control of an active front end (AFE) voltage-source converter (VSC) to achieve effective disturbance rejection in high-power systems with slower PWM switching frequencies (e.g., 5 kHz) and limited current controller bandwidth. Since the active rectifier is in series with the source and the load, there is no need to add additional hardware for harmonic elimination. The input positive- and negative-sequence voltages are extracted using the new observer methods and negative-sequence currents are injected to eliminate the dc link 120 Hz ripple. The observer-based disturbance rejection methods are proven to be very effective when all three types of disturbances (input voltage harmonics, unbalance, and inductor unbalance) co-exist simultaneously, even under input inductance variations of 30%. Simulation results are verified experimentally using a 15 hp adjustable-speed drive (ASD) system that includes an AFE-VSC coupled to a dSpace controller.