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Internal and External Bitstream Relocation for Partial Dynamic Reconfiguration

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6 Author(s)
Corbetta, S. ; Dipt. di Elettron. e Inf. (DEI), Politec. di Milano, Milan, Italy ; Morandi, M. ; Novati, M. ; Santambrogio, M.D.
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The research described in this paper shows how the runtime relocation of a reconfigurable component can be obtained using a system component that is able to update the bitstream information, moving the reconfigurable module in the desired position. This scenario defines the so-called partial bitstream relocation activity. This paper proposes a relocation filter that can be implemented both as a hardware and a software component. The former is hosted in the static part of the reconfigurable architecture, while the latter is made to be run on the processor placed on the field-programmable gate array (FPGA). The proposed approach has also been validated over different FPGAs, i.e., Virtex II Pro, Virtex 4, and Virtex 5, proposing a runtime relocation support that can be customized to meet all the different constraints associated with these different target architectures.

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Very Large Scale Integration (VLSI) Systems, IEEE Transactions on  (Volume:17 ,  Issue: 11 )