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A formal approach to nonlinear analog circuit verification

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2 Author(s)
Hedrich, L. ; Dept. of Electr. Eng., Hannover Univ., Germany ; Barke, E.

This paper presents an approach to nonlinear dynamic analog circuit verification. The input-output behavior of two systems is analyzed to check whether they are functionally similar. The algorithm compares the implicit nonlinear state space descriptions of the two systems on the same or on different levels of abstraction by sampling the state spaces and by building a nonlinear one-to-one mapping of the state spaces. Some examples demonstrate the feasibility of our approach.

Published in:

Computer-Aided Design, 1995. ICCAD-95. Digest of Technical Papers., 1995 IEEE/ACM International Conference on

Date of Conference:

5-9 Nov. 1995