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Complete Logic Functionality of Reconfigurable RTD Circuit Elements

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2 Author(s)
Yexin Zheng ; Bradley Dept. of Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA, USA ; Chao Huang

Innovative nanoscale devices have been developed to enhance future circuit design to overcome physical barriers hindering the CMOS technology. Among the emerging nanodevices, resonant tunneling diodes (RTDs) have demonstrated promising electronic features due to their high-speed switching capability and functional versatility. Great circuit functionality can be achieved through integrating heterostructure FETs (HFETs) in conjunction with RTDs to modulate effective negative differential resistance. In this paper, we propose novel programmable logic elements (PLEs) implemented in threshold gates (TGs) and multithreshold TGs by exploring RTD/HFET monostable-bistable transition logic element (MOBILE) principles. Our three-input PLE can be configured through five binary control bits to realize all the three-variable logic functions, which is, to the best of our knowledge, the first single RTD-based structure that provides complete Boolean logic implementation. It is also a more efficient reconfigurable circuit element than a general lookup table that requires eight configuration bits for three-variable functions. We further extend the design concept to construct a more versatile four-input PLE. A comprehensive comparison of three- and four-input PLEs provides an insightful view of design tradeoffs between performance and area. We present the mathematical proof of PLE's logic completeness based on Shannon expansion, as well as the HSPICE simulation results of the programmable and primitive RTD/HFET gates that we have designed. An efficient control bit generating algorithm is developed by using a special encoding scheme to implement any given logic function. Based on our PLE structures, we propose a reconfigurable architecture, namely MORE, which offers dynamic reconfigurability without incurring latency overheads, due to the intrinsic self-latching property of MOBILE circuits. An efficient reconfiguration data generation algorithm is also built to take full advantage of - - our MORE architecture. The experimental results indicate that it can help reduce the reconfiguration cost by 37% on average.

Published in:

IEEE Transactions on Nanotechnology  (Volume:8 ,  Issue: 5 )