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Plasma PH3-passivated high mobility inversion InGaAs MOSFET fabricated with self-aligned gate-first process and HfO2/TaN gate stack

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7 Author(s)
Jianqiang Lin ; Silicon Nano Device Laboratory, Department of ECE, National University of Singapore, Singapore 117576 ; Sungjoo Lee ; Hoon-Jung Oh ; Weifeng Yang
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N-type InGaAs MOS devices are fabricated using HfO2/TaN and HfAlO/TaN gate stacks. Both direct deposition and novel in-situ plasma PH3 surface passivation are compared. The PH3-passivated MOS capacitances shows high performance with EOT=1.7~3.0 nm, Jg=2times10-5 A/cm2 at Vg=2 V. After RTA, gate stack maintains stable with excellent C-V frequency dispersion of 1.3%. Silicon implanted InGaAs achieves good n+-p rectifying characteristic and low resistivity in the n+ S/D by 600degC RTA. Inversion-mode nMOSFET exhibits remarkable enhancement with the PH3-passivation. It shows an excellent S.S.=96 mV/dec and mueff=1600 cm2/Vs. There is significant reduction in S.S. and leap in drain current comparing to the recent reported inversion-mode III-V MOSFET and unpassivated control samples. In addition, sub 100 nm InGaAs MOSFET with the self-aligned gate-first process is demonstrated for the first time.

Published in:

2008 IEEE International Electron Devices Meeting

Date of Conference:

15-17 Dec. 2008