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A reverse-encoding-based on-chip AHB bus tracer for efficient circular buffer utilization

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3 Author(s)
Fu-Ching Yang ; Dept. of Comput. Sci. & Eng., Nat. Sun Yat-sen Univ., Kaohsiung ; Cheng-Lung Chiang ; Ing-Jer Huang

The post-T/pre-T trace refers to the trace captured before/after a target point is reached, respectively. Real time compression of the post-T trace in a circular buffer is a challenging problem since the initial state of the trace being compressed might be corrupted when wrapping around occurs and thus, makes it difficult to reconstruct the trace from the incomplete information stored in the circular buffer. This paper proposes an efficient compression algorithm which is capable of compressing both pre-T and post-T traces. The algorithm is based on an innovative reverse encoding scheme by reversing the order of the datum being encoded and the datum being referred. This algorithm has been successfully implemented in a realtime on-chip AHB bus tracer and has been embedded in a 3D graphics SoC as an application example. The bus tracer costs only 44 K gates and runs at 500 MHz on 0.13 mum technology. Experiments have shown that this bus tracer achieves 100% circular buffer utilization and captures 1.2times and 4.86times trace depths than state-of-the-art related work and conventional industrial approaches, respectively.

Published in:

Design Automation Conference, 2009. ASP-DAC 2009. Asia and South Pacific

Date of Conference:

19-22 Jan. 2009

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