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Trading Off Cache Capacity for Low-Voltage Operation

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6 Author(s)

Two proposed techniques let microprocessors operate at low voltages despite high memory-cell failure rates. They identify and disable defective portions of the cache at two granularities: individual words or pairs of bits. Both techniques use the entire cache during high-voltage operation while sacrificing cache capacity during low-voltage operation to reduce the minimum voltage below 500 mV.

Published in:

Micro, IEEE  (Volume:29 ,  Issue: 1 )