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Circuit Failure Prediction for Robust System Design in Scaled CMOS

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1 Author(s)
Mitra, S. ; Stanford Univ., Stanford, CA

Circuit failure prediction predicts the occurrence of a circuit failure "before" errors actually appear in system data and states. This is in contrast to classical error detection where a failure is detected after errors appear in system data and states. Circuit failure prediction is performed concurrently during system operation or during periodic on-line self-test by analyzing the data collected by special circuits called "sensors" inserted at strategic locations inside a chip. This talk demonstrated the concept of circuit failure prediction, practical implementation of the concept, and its effectiveness in overcoming major scaled-CMOS reliability challenges such as early-life failures (also called infant mortality) and aging. The concept of circuit failure prediction also provides insignts into early-life failure behaviors that may be used in developing new techniques for screening early-life failure candidates during production test.

Published in:

Integrated Reliability Workshop Final Report, 2008. IRW 2008. IEEE International

Date of Conference:

12-16 Oct. 2008

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