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Integrating formal methods tools to support system design

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3 Author(s)
Shiu-Kai Chin ; Dept. of Electr. & Comput. Eng., Syracuse Univ., NY, USA ; Faust, J. ; Giordano, J.

System engineering requires design and verification at several levels of abstraction-from top-level process descriptions down to gate-level hardware designs. A variety of tools such as specification languages, simulators, model checkers, theorem-provers, and other computer-aided design tools are used for designing and verifying systems. These tools must be integrated to support a continuous design flow. We report on the theoretical and practical aspects of integration and discuss our experience with specific tools

Published in:
Engineering of Complex Computer Systems, 1995. Held jointly with 5th CSESAW, 3rd IEEE RTAW and 20th IFAC/IFIP WRTP, Proceedings., First IEEE International Conference on

Date of Conference: 6-10 Nov 1995

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