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A single phase-locked loop (PLL) frequency synthesizer for a mode-1 multiband orthogonal frequency-division multiplexing (MB-OFDM) ultrawideband (UWB) system is realized in 0.13-mum CMOS. A current-reused multiply-by-1.5 circuit and a multiphase coupled ring oscillator are adopted to reduce the power consumption. For a 4.488-GHz signal, the measured image sideband is -40 dBc. The measured switching time from 3.342 to 4.488 GHz is 1.5 ns. The area is 0.85times0.9 mm2 and the power is 31.2 mW for a 1.2-V supply voltage.