Referenced Items are not available for this document.
A pixel-parallel self-similitude computation architecture has been developed for multiple-resolution directional edge filtering based on focal-plane image processing. The self-similitude organization has enabled pixel-by-pixel multiple-resolution image filtering with minimal complexity in interconnects. As a result, it has become possible to accomplish any (1/2)n-resolution directional edge filtering in (n+2) steps. An analog edge-filtering chip implemented using a switched floating-gate MOS (neuMOS) technology that is capable of performing four-directional edge filtering at full, half, and quarter resolutions was designed and fabricated in a 0.35-mum 3-metal CMOS technology. The concept has been experimentally verified using the fabricated chip, and the four-directional edge filtering at full, half, and quarter resolutions was demonstrated by measurement.
Published in:
Circuits and Systems I: Regular Papers, IEEE Transactions on
(Volume:56
,
Issue:
11
)
Date of Publication: Nov. 2009
- Page(s):
- 2384 - 2392
- ISSN :
- 1549-8328
- INSPEC Accession Number:
- 10957981
- Digital Object Identifier :
- 10.1109/TCSI.2009.2015598
- Product Type:
- Journals & Magazines
- Date of Publication :
- 18 February 2009
- Date of Current Version :
- 03 November 2009
- Issue Date :
- Nov. 2009
- Sponsored by :
- IEEE Circuits and Systems Society
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