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A 19.1-dBm Fully-Integrated 24 GHz Power Amplifier Using 0.18-μm CMOS Technology

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3 Author(s)
Jing-Lin Kuo ; Dept. of Electr. Eng. & Grad. Inst. of Commun. Eng., Nat. Taiwan Univ., Taipei ; Zuo-Min Tsai ; Huei Wang

A 24 GHz, 19.1 dBm fully-integrated power amplifiers (PA) was designed and fabricated in the 0.18-mum deep n-well (DNW) CMOS technology. This power amplifier is a 2-stage design using cascode RF NMOS configuration and has a maximum measured output power of 19.1 dBm, an OP1dB of 13.3 dBm, a power added efficiency (PAE) of 15.6%, and a linear gain of 18.8 dB when V DD and DNW are both biased at 3.6 V. The chip size is only 0.56 times 0.58 mm2. To the author's knowledge, this PA demonstrates the highest output power of +19.1 dBm among the reported PAs above 15 G.Hz in CMOS processes.

Published in:

Microwave Integrated Circuit Conference, 2008. EuMIC 2008. European

Date of Conference:

27-28 Oct. 2008

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