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Using traditional RFIC design architecture a broadband regenerative frequency divider is designed. By integrating the frequency divider in a single IC the size is reduced and the bandwidth is increased without compromising the phase noise performance. A one octave bandwidth, 3.2-6.4 GHz, is achieved with a phase noise floor below -157 dBc/Hz. For a narrower frequency band, 4.0-5.6 GHz, a phase noise floor below -167 dBc/Hz is measured. This is directly comparable to regenerative frequency dividers designed using conventional discrete components or commercially available dividers. At the same time the bandwidth is exceeded only by digital dividers, they however have a typical phase noise floor of -150 dBc/Hz at these frequencies. Both f0/2 and 3f0/2 are available at the output while the input frequency, f0, is suppressed to at least -20 dBc. The IC is manufactured by austriamicrosystems in their 0.35 mum SiGe-BiCMOS process with an fT of 70 GHz and is packaged in a 5times5 mm QFN plastic package.