By Topic

5.5 GHz Low Voltage and High Linearity RF CMOS Mixer Design

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Senhg-Feng Lu ; Inst. of Electron., Nat. Chiao-Tung Univ., Hsinchu ; Jyh-Chyurn Guo

A CMOS mixer was design with a new circuit scheme to realize low voltage and high linearity simultaneously. A double balanced Gilbert cell was adopted as the basic topology and TSMC 0.18 mum 1P6M CMOS process was employed for the on-chip RF circuit fabrication. The proposed new circuit scheme consists of LC-tanks as a capacitively coupled resonator for low voltage and multi-stage parallel RC networks for linearity improvement. Furthermore, multi-gated structure is applied at the RF input as a transconductance amplifier to enhance conversion gain and linearity. The new circuit scheme enables a successful low voltage operation at 1-V for 0.18 mum technology, The measured circuit performance demonstrates superior linearity with IIP3 of 11 dBm and P1dB of 2.2 dBm. The conversion gain can be maintained at 8.1 dB in a wide frequencies of 5 GHz to 6.8 GHz.

Published in:

Microwave Integrated Circuit Conference, 2008. EuMIC 2008. European

Date of Conference:

27-28 Oct. 2008