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A low phase noise and wide-bandwidth frequency divider has been developed in a 0.25 mum SiGe:C process. This paper discusses the BiCMOS design improvements used for ultra low phase noise applications like on-chip phase-noise measurement circuit. From a single-ended signal provided by a local oscillator LO, the wide- bandwidth frequency divider circuit generates accurate quadrature signals. For the full 1 kHz-5.5 GHz input frequency range, the frequency divider achieves an output quadrature error less than plusmn1deg. This paper presents a novel architecture designed for improving phase noise and exhibits a measured residual phase noise of -164 dBc/Hz @ 100 kHz with a 3.5 GHz input frequency.