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Design and Analysis of a Silicon-Based Millimeter-Wave Divide-by-3 Injection-Locked Frequency Divider

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4 Author(s)
Chun-Cheng Wang ; Nanoscale Commun. Integrated Circuits Lab., Univ. of California, Irvine, CA ; Zhiming Chen ; Jain, V. ; Heydari, P.

This paper presents an intuitive analysis and design/fabrication of a millimeter-wave (MMW) divide-by-3 injection-locked frequency divider (ILFD). Implemented in a 0.18 mum BiCMOS technology, the ILFD circuit exhibits an injection locking range of 1.8-2.7 GHz, a measurement-limited operating range of 75.6-78.6 GHz inside a PLL while simulated is from 70.1-82.3 GHz, and a phase noise of -105 dBc/Hz @ 1 MHz offset from the carrier. To the authors' best knowledge, this divide-by-3 ILFD chip achieves the highest operating frequency reported to date inside a silicon-validated frequency synthesizer loop.

Published in:

Silicon Monolithic Integrated Circuits in RF Systems, 2009. SiRF '09. IEEE Topical Meeting on

Date of Conference:

19-21 Jan. 2009