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Reduction of pump current mismatch in charge-pump PLL

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3 Author(s)
Hwang, M.-S. ; Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., Seoul ; Kim, J. ; Jeong, D.-K.

A charge pump that minimises the mismatch between the charging and discharging currents and keeps the currents constant across a wide output voltage range is described. The improved current matching helps reduce the static phase offset and reference spur of a charge-pump phase-locked loop (PLL) and the constant currents help control the PLL dynamics precisely. The proposed charge pump with dual compensation circuits demonstrates current mismatch of less than 3.2% and pump-current variation of 1.7% over the output voltage ranging from 0.2 to 1.0%V in the 0.13%%m CMOS process with 1.2%V supply.

Published in:

Electronics Letters  (Volume:45 ,  Issue: 3 )