Referenced Items are not available for this document.
As processor performance continues to improve, more emphasis must be placed on the performance of the memory system. In this paper, a detailed characterization of data cache behavior for individual load instructions is given. We show that by selectively applying cache line allocation according the characteristics of individual load instructions, overall performance can be improved for both the data cache and the memory system. This approach can improve some aspects of memory performance by as much as 60 percent on existing executables
Published in:
Microarchitecture, 1995., Proceedings of the 28th Annual International Symposium on
Date of Conference: 29 Nov-1 Dec 1995
- Page(s):
- 93 - 103
- Meeting Date :
- 29 Nov 1995-01 Dec 1995
- ISSN :
- 1072-4451
- Print ISBN:
- 0-8186-7349-4
- INSPEC Accession Number:
- 5170489
- Conference Location :
- Ann Arbor, MI
- Digital Object Identifier :
- 10.1109/MICRO.1995.476816
- Product Type:
- Conference Publications
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