New Front To Back-side 3D Interconnects Based High Aspect Ratio Through Silicon Vias

This paper describes a new front to back-side metallization process for 3D interconnect applications that require high aspect ratio through silicon vias (TSVs). A new bottom-up copper electroplating process is used to achieve a high aspect ratio vias of 15. First, a local sealing method is used in order to attain 80% of the vias filling with copper. Then a 're-fill' process is used for complete feedthrough metallization. By optimizing the process steps, cross-Kelvin structures based TSVs are implemented on both sides of the wafer and connected together without the need of a chemical mechanical polishing step. A very low Kelvin resistance (25m¿) is measured indicating that the process presented here is suitable for advanced 3D interconnects that requires fast signal transmission.