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With the increasing complexity of today's high speed electrical interfaces, electrical analysis of these interfaces is becoming exponentially complicated. Careful choice of channel design parameters for electrical modeling and analysis is becoming critical. Often, the electrical design space is too large for a full factorial analysis. Complex interfaces with large design spaces also make traditional techniques like Monte Carlo methods very time-consuming. Although faster statistical sampling methods such as Design of Experiments (DOE) can be very efficient, these methods are efficient only for linear or weakly non-linear design spaces. This paper compares DOE techniques with evolutionary algorithms for electrical design space exploration. Genetic Algorithms and Swarm Intelligence are discussed as evolutionary algorithms in this paper. The proposed approaches can be applied for high speed multi-drop interfaces like DDR2 and DDR3 and serial point-point interfaces like PCIe and Gigabit Ethernet. In this paper, serial and multi-drop test cases were analyzed to compare the performance of DOE and evolutionary techniques.