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Developing noise models for MOS transistors has recently been an active area of work because (i) a noise model is essential for many of the RF and microwave applications of the devices that have been enabled by the high device cutoff frequencies resulting from shrinking gate lengths ; (ii) the existing noise models employed in CAD software have severe limitations of applicability, consistency and parameter robustness; (iii) the existing noise models are not directly applicable or extendible to devices with sub 100 nm gates due to the appearance of new physical phenomena. The first part of this talk will include a brief survey of the current status of noise models for RF MOS devices, covering the range from theoretical foundations to practical CAD models. The second part will focus on one particular topic (the speakerpsilas own area of research, obviously!) - the RF and the low-frequency noise in the devices (including SOI devices), and its modeling. Progress towards the ultimate goal of developing a versatile, robust model that is also physically-based will be described.
Date of Conference: 21-24 Nov. 2008