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A CMOS Resizing Methodology for Analog Circuits

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4 Author(s)
Levi, T. ; LIMMS, Univ. of Tokyo, Tokyo ; Tomas, J. ; Lewis, N. ; Fouillat, P.

This article presents a CMOS resizing methodology for analog circuits during a technology migration, with easy-to-apply scaling rules based on a simple MOS transistor model. The goals are to transpose a circuit topology from one technology to another while preserving the main figures of merit and to quickly calculate the new transistor dimensions.

Published in:

Design & Test of Computers, IEEE  (Volume:26 ,  Issue: 1 )