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Learning Heuristics for the Superblock Instruction Scheduling Problem

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4 Author(s)
Russell, T. ; Cheriton Sch. of Comput. Sci., Univ. of Waterloo, Waterloo, ON, Canada ; Malik, A.M. ; Chase, M. ; van Beek, P.

Modern processors have multiple pipelined functional units and can issue more than one instruction per clock cycle. This places a burden on the compiler to schedule the instructions to take maximum advantage of the underlying hardware. Superblocks - a straight-line sequence of code with a single entry point and multiple possible exit points - are a commonly used scheduling region within compilers. Superblock scheduling is NP-complete, and is done suboptimally in production compilers using a greedy algorithm coupled with a heuristic. The heuristic is usually handcrafted, a potentially time-consuming process. In this paper, we show that supervised machine learning techniques can be used to semiautomate the construction of heuristics for superblock scheduling. In our approach, labeled training data were produced using an optimal superblock scheduler. A decision tree learning algorithm was then used to induce a heuristic from the training data. The automatically constructed decision tree heuristic was compared against the best previously proposed, handcrafted heuristics for superblock scheduling on the SPEC 2000 and MediaBench benchmark suites. On these benchmark suites, the decision tree heuristic reduced the number of superblocks that were not optimally scheduled by up to 38 percent, and led to improved performance on some architectural models and competitive performance on others.

Published in:

Knowledge and Data Engineering, IEEE Transactions on  (Volume:21 ,  Issue: 10 )

Date of Publication:

Oct. 2009

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