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System design optimization for MCM-D/flip-chip

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4 Author(s)
P. D. Franzon ; Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA ; A. Stanaski ; Y. Tekmen ; S. Banerjia

Many performance/cost advantages can be gained if a chip-set is optimally redesigned to take advantage of the high wire density, fast interconnect delays, and high pin-counts available in MCM-D/flip-chip technology. Examples are given showing for what conditions the cost of the system can be reduced through chip partitioning and how the performance/cost of a computer core can be increased

Published in:

IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part B  (Volume:18 ,  Issue: 4 )