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Design of Broadband CMOS Amplifier Using Bandwidth-Compensation Technique

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2 Author(s)
Heng-Ming Hsu ; Dept. of Electr. Eng., Nat. Chung Hsing Univ., Taichung ; Chan-Jung Hsu

A novel architecture is proposed to design broadband CMOS amplifier in this work. The proposed architecture includes the two-stage cascade and shunt peaking techniques. Accordingly, the bandwidth-compensation is executed to achieve gain flatness, broadband, low noise, and low power performances. The low noise amplifier (LNA) was fabricated in TSMC 0.18-mum CMOS process. Measurement results show that the design circuit accomplishes the highest gain-bandwidth product, which has the value of 173 GHz, compared with reported works using a 0.18-mum CMOS technology.

Published in:

Microwave Conference, 2008. EuMC 2008. 38th European

Date of Conference:

27-31 Oct. 2008