Voltage-controlled-current-source-only verilog-a resistor model for R⩾0

Conventionally, implementation in circuit simulators of resistor models that can support zero or small-valued resistances is done by changing the model formulation from I = V/R, which is preferred for nodal analysis but cannot be used for R = 0, to V = IR for small values of resistance, or by "collapsing" the nodes between which the resistor is connected for R = 0. For compact model implementation purposes, in simulators based on the modified nodal formulation it is more convenient to have models that are composed solely of voltage-controlled current sources, rather than having to conditionally include a current-controlled voltage source or node collapse. We present a Verilog-A implementation of a resistor model that uses only such sources yet can handle small and zero valued resistances.