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The context-based adaptive variable length coding (CAVLC) is a new and efficient entropy coding tool for the H.264/AVC. Although the CAVLC provides the excellent compression ratio, the computational complexity of the CAVLC decoder (CAVLD) is higher than that of the traditional variable length decoder. In this paper, we propose a low-power and low-cost architecture of the CAVLC decoder for the H.264/AVC baseline profile. The research derives the optimum power model for the variable length look-up table (LUT) of the CAVLC decoder, and then we divide the decoding phase of the LUT into two decoding layers. We also merge the common code words to reduce the hardware cost among the different LUTs in the second decoding layer. Moreover, the design is based on the 0.18-mum TSMC CMOS technology. The experimental results show that the proposed decoder operates at the 125 MHz clock frequency with the hardware cost of 4412 gates. Furthermore, the proposed design can reduce the power consumption about 44% to 48% more than the previous low-power CAVLD schemes do.