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Active ESD protection design against cross-power-domain ESD stresses in CMOS integrated circuits

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2 Author(s)
Shih-Hung Chen ; Circuit Design Dept., Ind. Technol. Res. Inst., Hsinchu ; Chih-Ting Yeh

New active ESD protection design for the interface circuits between separated power domains has been proposed and successfully verified in a 0.13-mum CMOS technology. The HBM and MM ESD robustness of the separated-power-domain interface circuits with the proposed active ESD protection design can achieve over 4 kV and 400 V, respectively.

Published in:

Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on

Date of Conference:

Nov. 30 2008-Dec. 3 2008