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The presented parameterised and predictive architecture is dedicated for image analysis algorithms implementations on FPGAs. Image analysis algorithms have shared characteristics. These characteristics serve as a basis for the presented parameterised architecture. The architecture design is based on the linear effort property and reusable IP. For a new algorithm implementation, adaptations only concern a small part of the entire architecture. New IPs are developed in handel-C using the DK design suite tool provided by Celoxica. The design space exploration (DSE) is made off-line with the use of prediction models which results in a shorter design time and the generated architecture will satisfy the given constraints. An example of the design process is presented with the multispectral imaging implementation instead of the particle image velocimetry (PIV) algorithm.