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A Single-Chip 2.5-Gb/s CMOS Burst-Mode Optical Receiver

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3 Author(s)
Wei-Zen Chen ; Nat. Chiao-Tung Univ., Hsinchu, Taiwan ; Ruei-Ming Gan ; Shih-Hao Huang

This paper describes the design of a 2.5-Gb/s burst-mode optical receiver in a 0.18-mum CMOS process. A dual-gain-mode transimpedance amplifier (TIA) with constant damping factor control is proposed to tolerate a wide dynamic range input signal. By incorporating an automatic threshold tracking circuit (ATC), the TIA and limiting amplifier (LA) are dc coupled with feedforward offset cancellation. Dual-band filters are adopted in the ATC for a rapid response time while keeping the tracking error small. By integrating both a TIA and a post-LA in a single chip, the burst-mode receiver provides a conversion gain of 106 dBmiddotOmega in the high gain mode, 97 dBmiddotOmega in the low gain mode, and a -3-dB bandwidth of 1.85 GHz. The measured input sensitivity, overload level, and dynamic range of the optical receiver are -19 dBm, -2 dBm, and 17 dB, respectively. The response time is less than 50 ns. Operating under a single 1.8-V supply, this chip dissipates only 122 mW.

Published in:

Circuits and Systems I: Regular Papers, IEEE Transactions on  (Volume:56 ,  Issue: 10 )

Date of Publication:

Oct. 2009

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