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Three-dimensional integrated circuit (3D IC) is emerging as an attractive option for overcoming the barriers in interconnect scaling, thereby offering an opportunity to continue performance improvements using CMOS technology. 3D IC offers the advantages of high performance, low power, smaller form-factor, and heterogeneous integration benefits. However, to enable the wide adoption of the 3D integration technology, there exist many challenges that need to be addressed. First, cost analysis at the early design stage to help the decision making on whether 3D integration should be used for the application is very critical. EDA design tools are the key to enable effective 3D IC designs; design space exploration at the architecture design is also important to fully take advantages that 3D offers. This article provides a tutorial on the design tools and methodologies to help design space exploration in 3D IC designs.