A novel low-power digital baseband circuit for UHF RFID tag with sensors is presented in this paper. It proposes a novel baseband architecture and a new operating scheme to fulfill the sensor functions and to reduce power consumption. It is also compatible with the EPC C1G2 UHF RFID protocol. It adopts some advanced low power techniques for system design and circuit design: adaptive clock-gating, multi-clock domain and asynchronous circuit. The baseband circuit is implemented in 0.18 ¿m 1P3M standard CMOS process. The chip area is 0.28 mm2 excluding test pads. Its power consumption is 25 ¿W under 1.1 V power supply.
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Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Date of Conference: 20-23 Oct. 2008