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Memory-efficient architecture including DWT and EC for JPEG2000

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5 Author(s)
Jie Guo ; State Key Lab. of Integrated Service Networks, Xidian Univ., Xi''an, China ; Cheng-ke Wu ; Yun-song Li ; Ke-yan Wang
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In this paper, a memory-efficient and high-throughput VLSI architecture, which functionally includes discrete wavelet transform (DWT) and entropy coder (EC), is presented for JPEG2000 implementation. The proposed architecture is made up of line-based DWT using lifting scheme combined with the EC architecture performed in a bit plane parallel coding way. Based on this, an efficient memory strategy for wavelet transform coefficients connecting DWT and EC is designed, using on-chip memory units with the same size as a code block for an image tile with resolution 512×512 and code block size 32×32, the input sampling is up to 45 M pixels/s when EC operates at 100 MHz, yet the memory reduction is over 65%, compared with buffers for transform coefficients in tile size. Such features suit well applications for high-speed as well as low-memory, especially for large-tile image compression.

Published in:
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on

Date of Conference: 20-23 Oct. 2008

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