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Gradual Ge1−xSix/Si heteronanocrystals based non-volatile floating gate memory device with asymmetric tunnel barriers

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7 Author(s)
Jin Lu ; Department of Physics and Key Laboratory of Photonic and Electronic Materials, Nanjing University, 210093, China ; Guangli Wang ; Yubin Chen ; Zheng Zuo
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The gradual Ge1-xSix/Si heteronanocrystals on ultra thin SiO2 were fabricated to form the metal-oxide-semiconductor (MOS) memory structure with asymmetric tunnel barriers through combining self-assembled growth and selective chemical etching technique. Charge storage characteristics in such memory structure have been investigated by using capacitance-voltage measurements. The observations demonstrate that the holes reach a longer retention time even with an ultra thin tunnel oxide, owing to the high band offset at the valence band between Ge and Si.

Published in:

Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on

Date of Conference:

20-23 Oct. 2008