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Nanometer circuits are becoming increasingly susceptible to soft errors due to alpha particle and atmospheric neutron strikes as device scaling reduces node capacitances and supply voltage scaling reduces noise margins. The result is a significantly reduced reliability that becomes unacceptable in an increasingly number of applications as we move deeper to the nanotechnologies. In this context, logic soft errors, a concern for space applications in the past are a reliability issue at ground-level today. More and more techniques were used to mitigate various faults including the logic soft errors. The paper comprehensively analyzes logic soft errors sensitivity in future deep submicron processes, and also discusses the fault tolerant schemes at different design levels.