By Topic

A Scalable Heterogeneous Multi-Processor Signal Processing System Based on the RapidIO Interconnect

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Xiongkui Zhang ; Dept. of Electron. Eng., Beijing Inst. of Technol., Beijing ; Meiguo Gao ; Guoman Liu

The ever-increasing performance requirement of real-time signal processing applications drives the integration of emerging interconnect technologies with high-performance processors and ADCs. In order to construct a scalable and high-performance signal processing system, we have developed two kinds of flexible signal processing modules based on high performance ADC, heterogeneous processors and the RapidIO interconnect technology. The receiver module mainly consists of two 10 bits 2 Gsps ADCs, one TMS320C6455 and one XC5V95T FPGA. And the processing module is composed of four TMS320C6455 and one XC4VSX55. In this paper, a heterogeneous massive multi-processor system consists of one receiver module and two processing module aggregated by the RapidIO is introduced which may act as dual-channel wideband receiver. And its application in multi-channel receiver is discussed.

Published in:

Intelligent Information Technology Application Workshops, 2008. IITAW '08. International Symposium on

Date of Conference:

21-22 Dec. 2008