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Arithmetic Operations and Their Energy Consumption in the Nios II Embedded Processor

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3 Author(s)
Cambre, D.M. ; Sch. of Comput. Eng., Univ. Autonoma de Madrid, Madrid ; Boemo, E. ; Todorovich, E.

This paper reports the impact of different Nios II hardware and software options for arithmetic operations on its power and energy consumption. These options are evaluated on the Cyclone II and Stratix II FPGA families using a number of benchmark programs. This analysis is part of a more complete study oriented to characterize the power and energy consumption of an embedded processor like the Alterapsilas Nios II. Results are based on physical measurements and show significant energy savings and higher performance in arithmetic operations when available arithmetic hardware suitable for these operations is included. However when the utilization of resources is taken into account, then setups with less hardware and more software for arithmetic computation can be more efficient.

Published in:

Reconfigurable Computing and FPGAs, 2008. ReConFig '08. International Conference on

Date of Conference:

3-5 Dec. 2008