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Quasi-linear amplification using self-phase distortion compensation technique

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3 Author(s)
H. Hayashi ; NTT Wireless Syst. Labs., Yokosuka, Japan ; M. Nakatsugawa ; M. Muraguchi

This paper demonstrates a self-phase distortion compensation technique to realize linear power amplifiers, in which the positive phase deviation from a common-source FET and the negative phase deviation from a common-gate FET cancel each other. It is confirmed both theoretically and experimentally that increasing the drain-to-source conductance, Gd, causes the self-phase distortion compensation effect. An experimental power amplifier for L-band personal communications systems, which employs the cascode connection, shows good phase deviation performance. More than 20-dB gain, 21-dBm output power, and 50% power added efficiency are obtained along with the adjacent channel interference of -52 dBc in 192-kHz bands at 600-kHz offset frequency from 1.9 GHz at the operating voltage of only 3 V. The demonstrated performances satisfy the specifications for the 1.9-GHz Japanese Personal Handy-phone System (PHS) utilizing the π/4-shift QPSK modulation scheme. The proposed technique is suitable for MMIC design, and allows the design of handsets that are small, lightweight, and have long operating times

Published in:

IEEE Transactions on Microwave Theory and Techniques  (Volume:43 ,  Issue: 11 )