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A design approach for multiprocessor systems on FPGAs is presented. The goal is to customize such systems for target parallel programs by simultaneously solving the problems of task mapping and high level synthesis. By considering the effect of fixed-priority preemptive scheduling when several tasks share a processor resource, a broad spectrum of embedded application requirements is covered. Experimental results, in which architectures for IEEE 802.11g and WCDMA baseband signal processing are synthesized, demonstrate the feasibility.