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On the effective use of a cache memory simulator in a computer architecture course

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1 Author(s)
H. G. Rotithor ; Dept. of Electr. & Comput. Eng., Worcester Polytech. Inst., MA, USA

In this paper, we describe how a cache memory simulator can be effectively used to enhance the understanding of cache memories in a computer architecture course. Various types of course assignments that are described in this paper require the use of the simulator to understand effects of varying different cache parameters on the system performance, to analyze cache memory designs, to synthesize cache designs, and to incorporate advanced caching concepts like victim caching, stall caching, and multilevel caching by modifying the simulator. Dinero, a cache simulator available in the public domain, has been enhanced and used in the course. Our experience of using the simulator is described

Published in:

IEEE Transactions on Education  (Volume:38 ,  Issue: 4 )