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A Center-Offset Polycrystalline-Silicon Thin-Film Transistor With {\rm n}^{+} Amorphous-Silicon Contacts

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7 Author(s)
Oh, J.H. ; Dept. of Inf. Display, Kyung Hee Univ., Seoul ; Kang, D.H. ; Park, W.H. ; Jang, J.
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We have studied a bottom-gate polycrystalline-silicon thin-film transistor (poly-Si TFT) with amorphous-silicon (a-Si) n+ contacts and center-offset gated structure, where intrinsic poly-Si is used in the center-offset region. The fabrication process is compatible with the conventional a-Si TFT with addition of thermal annealing for crystallization of a-Si. The bottom-gate poly-Si TFT with a 5-mum offset length exhibited a field-effect mobility of 18.3 cm2/V middots and minimum OFF-state current of 2.79 times 10-12A/mum at Vds= 5 V. The leakage currents are two orders of magnitude lower than those of a nonoffset TFT with mobility drop from 23.8 to 18.3 cm2/ Vmiddots.

Published in:

Electron Device Letters, IEEE  (Volume:30 ,  Issue: 1 )

Date of Publication:

Jan. 2009

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