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A 50 to 70 GHz wideband power amplifier (PA) is developed in MS/RF 90 nm 1P9M CMOS process. This PA achieves a measured Psat of 13.8 dBm, P1 dB of 10.3 dBm, power added efficiency (PAE) of 12.6%, and linear power gain of 30 dB at 60 GHz under VDD biased at 1.8 V. When VDD is biased at 3 V, it exhibits Psat of 18 dBm, P1 dB of 12 dBm, PAE of 15%, and linear gain of 32.4 dB at 60 GHz. The MMIC PA also has a wide 3 dB bandwidth from 50 to 70 GHz, with a chip size of 0.66 times 0.5 mm2. To the author's knowledge, this PA demonstrates the highest output power, with the highest gain among the reported CMOS PAs in V-band.